Computers, Software Engineering, and Digital Devices (The by Richard C. Dorf

By Richard C. Dorf

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Due to the improved design features and popularity of edge-triggered flip-flops, master-slave flip-flops are not recommended for newer designs and, in some cases, have been made obsolete by manufacturers, making them difficult to obtain even for repair parts. For this reason, only edge-triggered flip-flops will be discussed. Four types of edge-triggered flip-flops are presented here. These are the D, J-K, T and S-R flip-flops. The D type is the most commonly used because its circuitry generally takes up less space on an IC chip and because most engineers consider it an easier device to use as the excitation equation to drive the D input is identical to the next state equation.

The second device is a pnpn structure referred to as a vertical-to-surface transmission electrophotonic device (VSTEP). The operation of these pnpn structures can be illustrated through the use of load lines. For the simplest device, the load consists of a resistor and a power supply. 31(b), we see that for small amounts of light, the device will be at point A. Point A is in a region of high electrical impedance with little or no optical output. 31(c)]. At this point the electrical impedance is low and light is emitted.

30. , set ¼ 1, reset ¼ 0), then the S-SEED AND gate is set to its ‘‘on’’ state. For any other input combination, there is no change of state, resulting in AND operation. After the signal beams determine the state of the device, the clock beams are then set high to read  output out the state of the AND gate. For NAND operation, the logic level is represented by the power of the c  output is signal relative to the power of the c output signal. 30 Logic using S-SEED devices. 31 pnpn devices: (a) basic structure, (b) voltage/output characteristics, (c) input/output characteristics, and (d) timing diagram of device operation.

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